The present invention relates to electronic circuits, and more particularly, to techniques for canceling offsets in differential circuits.
FIG. 1 illustrates a prior art differential sense amplifier 100. Sense amplifier 100 includes p-channel metal oxide semiconductor field-effect transistors (MOSFETs) 101-105 and n-channel MOSFETs 106-110. Input voltage signals IN and INB are transmitted to the gates of differential pair transistors 108 and 109, respectively. A digital periodic clock signal CLK is transmitted to the gates of transistors 101, 102, 105, and 110. Output voltage OUTB is generated at the drains of transistors 103 and 106, and output voltage OUT is generated at the drains of transistors 104 and 107.
When clock signal CLK is in a logic high state, transistor 110 is on, and transistors 101, 102, and 105 are off. Sense amplifier 100 amplifies the differential input voltage between IN and INB to generate a differential output voltage between OUT and OUTB when clock signal CLK is in a logic high state. When clock signal CLK is in a logic low state, transistor 110 is off. Also when CLK is low, transistors 101, 102, and 105 are on, pulling both of the output voltages OUT and OUTB to supply voltage VCC. Sense amplifier 100 is disabled when CLK is low.